﻿Item,ActualCandidate,Finding,OpenQualification,Evidence
VM input,J2 and U1 VM9/10/11,PIN_NET_FUNCTION_MATCH,Board-wide supply range unknown; ADC divider and bus-energy path cannot inherit IC35V rating,TI pp4-6
VM bypass,C1-C6 0.1u; C7/C8 22u; C9 220u35V,NOMINAL_TOPOLOGY_MATCH,"DC bias,ripple,regeneration,voltage margin,layout and thermal open",TI p19
charge pump,C10 CP/VM1u25V; C11 CPH/CPL47n50V,NOMINAL_TOPOLOGY_MATCH,"Effective capacitance,placement and waveform open","TI p19,p31"
AVDD,C12 1u16V to GND,NOMINAL_TOPOLOGY_MATCH,Required 0.7-1.3u effective capacitance at3.3V across temperature not proven,"TI p19,p30"
mixed buck,R1 22R SW_BK/FB_BK; C13 22u10V,RESISTOR_TOPOLOGY_SUPPORTED_BY_MANUFACTURER,"Not a missing-inductor defect; startup effective capacitance,current/power and waveform open; helper disables buck only after wake","TI pp8-9,p53"
off gate,R15 AVDD/DRV_OFF10k; Q1 BSS138BK,SCHEMATIC_DEFAULT_OFF_CANDIDATE,"Rise/fall,unpowered MCU,separate-rail sequencing and hot/cold not measured","TI p10,p53; A29"
sleep,A32 PF1 to J1pin9; R4 100k pulldown,CAD_FIRMWARE_MATCH,Actual VOH/VOL/load/cable and HSI clock plan open,TI p10; A32
fault,R7 AVDD to nFAULT5.1k; controllerPA6,PULLUP_PRESENT,"Power-up nFAULT test-mode condition,MCU unpowered injection and fault path not measured","TI p19,p53"
SPI MISO,R9 CTRL3V3 pullup; controllerPB14,PULLUP_PRESENT,Driver defaults push-pull then helper selects open-drain; rail sequencing and RC timing require measurement,"TI pp5,24,63"
VREF/ILIM,R2 11.3k/R3 10k; C14 10n,MODE_DEPENDENT_APPLICATION,Pin37 defaults VREF in6x mode; helper changes to6xCBC ILIM before accepting config. Current profile and thresholds must be selected for actual motor,"TI pp5,45,63"
ADC current,SOA/B/C via100R/1n toPA0/PA1/PA2,PIN_NET_MATCH,"Actual AVDD/VDDA,swing,ADC settings,offset/gain calibration,blanking open","TI pp5,45"
ADC bus,R13 100k1%/R14 22k1% toPA3,RANGE_GATE_OPEN,"At24V worst divider4.399V; chip35V range is not board allowable input. Actual bus,VDDA and energy clamp must be fixed together",Computed in checks.json
SPI NPOR,IC_STAT and response header bit3,FIRMWARE_CORRECTED_AND_HOST_TESTED,Register-model proof only; no hardware SPI run,"TI pp54-55,58,63"
