#include "host_stream_fixture.h"
int main(void){unsigned cases=0;
 for(unsigned v=0;v<256;++v){fixture();drill_config.control2_readback=(uint8_t)v;assert(dc_feedback_ready(&drill_config)==(v==0x40));if(v!=0x40){assert(!drill_dual_bench_begin(0,true)&&!drill_adc_bench_begin(0,true));assert(drill_dual_state==DU_IDLE&&drill_adc_state==DA_IDLE&&!(rcc.AHB2ENR&RCC_AHB2ENR_ADC12EN));}++cases;}
 for(unsigned v=0;v<256;++v){fixture();drill_config.gain_readback=(uint8_t)v;assert(dc_feedback_ready(&drill_config)==(v==1));++cases;}
 for(unsigned v=0;v<5;++v){fixture();if(v==0)drill_config.step=21;if(v==1)drill_config.npor_required=false;if(v==2)drill_config.error=DC_READBACK;if(v==3)drill_config.state=DC_FAILED;if(v==4)drill_config.control2_readback=0x42;assert(!dc_feedback_ready(&drill_config));assert(!drill_dual_bench_begin(0,true)&&!drill_adc_bench_begin(0,true));++cases;}
 /* Reject mode changes after ADC/DMA ownership, invoking the actual hard-off. */
 fixture();ready(0);drill_config.control2_readback=0x42;timer2.CNT=60;drill_dual_poll(60);off();++cases;
 streaming(0);transfer(0x08000800);drill_config.control2_readback=0x42;timer2.CNT=65;drill_dual_poll(65);stream_off();++cases;
 assert(!dc_feedback_ready(NULL));++cases;
 printf("%u FEEDBACK MODE / CBC REJECTION / READBACK / HARD-OFF CASES PASS\n",cases);}
