#include "drill_clock.h"
FLASH_TypeDef flash;PWR_TypeDef pwr;uint32_t SystemCoreClock;
/* Frozen healthy profile for peripheral tests, not a clock transition model. */
static void host_clock_profile(void){
 rcc.CR=RCC_CR_HSION|RCC_CR_HSIRDY|RCC_CR_PLLON|RCC_CR_PLLRDY;
 rcc.PLLCFGR=DRILL_PLL_CONFIG;rcc.CFGR=RCC_CFGR_SW_PLL|RCC_CFGR_SWS_PLL;
 rcc.APB1ENR1|=RCC_APB1ENR1_PWREN;
 memset(&pwr,0,sizeof pwr);pwr.CR1=PWR_CR1_VOS_0;pwr.CR5=PWR_CR5_R1MODE;
 memset(&flash,0,sizeof flash);flash.ACR=FLASH_ACR_LATENCY_4WS;SystemCoreClock=DRILL_CORE_HZ;
}
