Older project compatibility
Older LMV321 projects correct the inverting input (pin 3 ) and negative supply (pin 2 ) pad mappings on opening, and clear old routing. Reroute, check and save the project.
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Connection checks and export
SPICE netlist export
Export a netlist for your SPICE simulator. Verify model parameters against component datasheets.
Labels with the same name connect globally and are case-sensitive. GND connects to ground symbols. No-connect markers identify intentionally unused pins; power flags indicate a supplied net. Checks cover connections and footprint completeness, not circuit function.
Issues
Net list
Bus groups
Bus groups retain KiCad bus names and connected member nets. A bus groups nets without shorting them together.
Circuit JSON includes schematic nets and current PCB pads. The verification package contains open-source exporter output: Gerber / drill files, BOM and placement verification files. Current valid routing is included. Independent DRC is required before production. Native schematics embed symbols and retain physical pin connections, power flags and bus members. Wires are routed around obstacles; buses are redrawn as member legends. Basic templates have been checked with KiCad 10.0.6 . Complex layouts may need repositioning before export. Recognized two-terminal parts use standard graphics; other imported parts use normalized boxes. Save the PCB layout in the project file separately.XML uses the KiCad intermediate netlist structure; import into KiCad PCB has not been verified. Default diode mapping: K → Pad 1, A → Pad 2; transistor, MOSFET and regulator pad mappings apply only to the listed parts. Check the datasheet when substituting components.
Start from a pad, click to add corners, then click a same-net pad to finish. Esc to cancel.
PCB Rules have not been checked.
No net selected.
Rule check results
Autorouter has not run yet.
Uses the open-source tscircuit local two-layer autorouter. Presets are editable starting values; confirm them against your manufacturing order. Parameters apply to the next autoroute or new manual route; existing routing keeps its saved rules. Red is top copper, blue is bottom. Airwires show target connections, not an unconnected-net count. Checks cover copper connectivity, shorts, copper// hole clearance and rectangular board-edge clearance; they do not replace full manufacturing DRC.
Drag components · Drag empty space to pan · Scroll to zoom · 0.05 mm snap · Airwires show target connections
Trace editing
Select a trace on the canvas or in the list. Deleting a path also removes its vias. Each change supports undo. Rerun rule checks after editing.
Layout issues
Checks identify out-of-bounds or overlapping courtyards. Rule issues are listed individually. Verify footprints against component documentation. Schematic and PCB layout are saved together using Save project file above.